1. Field of the Invention
The invention related generally to a restore reference circuit arrangement for a semiconductor memory circuit and more particularly to a restore reference circuit for use with cross-coupled bipolar transistor storage cells.
2. Description of the Prior Art
Memory storage cells comprised of cross-coupled bipolar transistors are described in commonly assigned U.S. Pat. No. 3,354,440. The operation of such cross-coupled bipolar storage cells is described in detail in the above mentioned patent. Cross-coupled bipolar transistor storage cells which use resistors as load elements and schottky diodes as the coupling elements to the bit lines are also taught in the IBM Technical Disclosure Bulletin Vol. 16 No. 6 Nov. 1973 pages 1920 and 1921. The above described cross-coupled bipolar transistor cells are arranged in memory arrays and a number of such cells are connected between the same pair of bit lines. When sensed, the cell node potentials of such cells are slowly charged to the values needed to prevent the storage cell from being affected by read/write operations being performed on an adjacent storage cell. Thus a relatively long time must elaspe before the next read/write cycle can be started in such memory arrays.